EDN

ARCHITECTURES: On-chip interconnect gets off the bus

Monterey, Calif. — Moderate-scale systems-on-chip (SoCs) have grown so similar that most can be described with a single block diagram. A central processor emits a processor-specific high-speed bus ...
Semiconductor Engineering

A Brief History Of The Interconnect

The high functional integration of system-on-chip designs today is driving the need for new technological approaches in semiconductor design. Anyone who owns a Samsung Galaxy S4, HTC One or comparable ...
EDN

Altera moves to ease serial-bus-interconnect issues on boards

As boards have become more congested and the volume of data moving between chips has grown, the traditional approach of simply extending a CPU parallel bus to the other major chips on the board has ...