EDN

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 2)

Note: This is the second part of a two-part article covers the remaining steps to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. Steps 4 ” ...
Design-Reuse

Altera's Stratix II FPGAs Enable 667-Mbps DDR2 SDRAM Data Rate

See 667-Mbps DDR2 SDRAM Interface Demonstration at DesignCon 2006 SAN JOSE, Calif. -- Feb. 6, 2006-- Altera Corporation (Nasdaq: ALTR) today announced that its Stratix(R) II device family is qualified ...
电子工程专辑

MEMORY系列之“DDR概述”

本文主要介绍DDR的发展历史及相关标准，每一代的特性，工作原理，引脚定义。 DDR全称为Double Data Rate Synchronous Dynamic Random Access Memory，从1996年三星公司提出到现在已经发展到了第六代。 1、DDR发展历程及相关标准 DDR发展至今，主要出现了如下一些版本，及其 ...
Design-Reuse

eInfochips announces DDR2 SDRAM SystemVerilog & VMM based Memory Model Generator Tool

GUI based tool targeted to reduce verification time and maximize memory coverage Ahmedabad -- June 2, 2009 -- eInfochips, Inc., a leading IP driven ASIC/FPGA/SoC, Embedded Systems & Software design ...
Ars Technica

MetaRAM quadruples DDR2 DIMM capacities, launches 8GB DIMMs

Since its launch in January 2006, the only thing that has been publicly known about former AMD CTO Fred Weber's new venture is its name: MetaRAM. Clearly, the stealth-mode company was working on ...
EDN

Standards body begins to advance DDR2 SDRAM

Even as suppliers begin sampling the first of their DDR2 SDRAM chips and modules, advanced versions of the next-generation memory are being defined. The JEDEC Solid State Technology Association has ...
Hexus

SiS656 Completes DDR2-667/533/400 Memory Co-Validation with Elpida, Micron and Samsung

Taipei, Dec. 8th, 2004 -- Silicon Integrated Systems Corp (SiS), a leading supplier of core logic chipsets, announced today that its SiS656 Northbridge chipset has passed all PCI-SIG's PCI Express ...
Electronic Design

IP Core Accelerates FPGA Access To DDR2 SDRAM

The company has announced what it is calling the industry’s first 533-Mb/s DDR2 SDRAM controller IP core supporting the LatticeECP2/ECP2M low-cost FPGA families, and the high-end LatticeSC FPGA family ...
CIOL

eInfochips announces DDR2 SDRAM IP

AHMEDABAD, INDIA: eInfochips Inc. today announced the availability of JEDEC (JESD79-2D) compliant DDR2 SDRAM (double-data-rate-two synchronous dynamic random access memory) verification IP and ...
TechSpot

Samsung announces First 2-Gigabit DDR2 SDRAM

Serving tech enthusiasts for over 25 years. TechSpot means tech analysis and advice you can trust. "Samsung plans to launch mass production of the 80nm process, 2Gb DDR2 SDRAM in the second half of ...
ZDNet

Take 2 for PC memory

This year is shaping up nicely for PC memory makers: Prices for the current DDR technology are surging, and a new, high-profit replacement is about to hit store shelves. DDR2 will likely sell for a ...