EDN

Physical Design Flow Taps Partition Layout

Detailed and precise hierarchical design planning is essential to achieving closure on large designs. In this article we describe a new hierarchical design flow and its usage on a 3 million-gate chip.
Semiconductor Engineering

Secure Physical Design Roadmap Enabling End-To-End Trustworthy IC Design Flow

The FICS Research Institute (University of Florida) has published a new research paper titled “Secure Physical Design.” This is the first and most comprehensive research work done in this area that ...
Electronic Design

Move Your Thermal Strategy For Air-Cooled Electronics Up In The Design Flow

There are two golden rules to thermal design: start simple and start early. The heat-flow path from the junction to the ambient, usually air in the local environment, determines a component’s ...
Business Wire

Cadence RFIC Solutions Support TSMC N6RF Design Reference Flow

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence ® RFIC solutions are enabled to support TSMC’s N6RF Design Reference Flow and process design ...
Semiconductor Engineering

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible

We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The ...
EDN

Four ways to build a CAD flow: In-house design to custom-EDA tool

An internal computer aided design (CAD) or design services engineer is responsible for delivering efficient, robust and high-quality design flow solutions. The design flow on a day-to-day basis keeps ...