EDN

Low power LDPC decoder created using high level synthesis

HLS methodology allows the hardware design to be completed at a higher level of abstraction such as C/C++ algorithmic description. This provides significant time and cost savings, and paves the way ...
New Electronics

AccelerComm develops LDPC Decoder for Intel’s FlexRAN

AccelerComm, the company specialising in optimisation and latency reduction IP, has announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The solution is ...
Total Telecom

AccelerComm’s New Highly Optimised LDPC Decoder in Software for Intel’s FlexRAN Reference Software Will Increase 5G Throughput by up to 3X

AccelerComm, the company supercharging 5G with Optimisation and Latency Reduction IP, today announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The ...
Design-Reuse

Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding

This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...
Total Telecom

AccelerComm Unveils Fully Integrated PUSCH Decoder to Supercharge 5G NR for Performance-Critical Channels

AccelerComm, the channel coding specialist, is supercharging 5G NR with cutting edge Physical Layer IP which increases spectral efficiency and reduces latency. The company today announced a complete ...
Nature

Information Theory and Low-Density Parity-Check Codes

Information theory underpins modern digital communication by quantifying information and delineating the limits of data transmission. Among its most celebrated implementations are Low-Density ...
EDN

LDPC: Another Key Step Toward Shannon

For communication designers, especially those in the networking and wireless field, the Shannon limit can be seen as the Holy Grail. And, since being first defined in ...
New Electronics

AMD licenses AccelerComm’s 3GPP LDPC accelerator IP

AccelerComm, the Layer 1 5G IP specialists, has announced that AMD has licensed its 3GPP LDPC accelerator IP for use on its T2 Telco Accelerator Card. AMD’s T2 Telco Accelerator Card provides a high ...
Design-Reuse

New Highly Optimised LDPC Decoder in Software for Intel's FlexRAN Reference Software Will Increase Throughput by up to 3X

Southampton, UK – March 18, 2020 – AccelerComm, the company supercharging 5G with Optimisation and Latency Reduction IP, today announced they have developed a highly optimised LDPC software decoder in ...