电子工程专辑

进一步加快时序收敛，赛灵思ISE WebPACK 9.1i版本发布

可编程逻辑解决方案提供商赛灵思公司(Xilinx, Inc.)日前宣布推出最新版本、可免费下载的逻辑设计套件——集成软件环境(ISE) WebPACK 9.1i，目前用户可立即下载使用。这一新版本包含了使用广泛的赛灵思ISE Foundation软件9.1i版的所有特性，并可对嵌入式、数字信号 ...
电子工程专辑

赛灵思发布ISE WebPACK 9.1i版本，功能更加强大

可编程逻辑解决方案提供商赛灵思公司(Xilinx, Inc.)日前宣布推出最新版本、可免费下载的逻辑设计套件——集成软件环境(ISE) WebPACK 9.1i，目前用户可立即下载使用。这一新版本包含了使用广泛的赛灵思ISE Foundation软件9.1i版的所有特性，并可对嵌入式、数字信号 ...
Design-Reuse

Xilinx and EV Engineering deliver MHz co-simulation with Virtex-II technology

Based on the advanced Virtex-IITM FPGAs ZeBu accelerates co-simulation of designs driven by Verilog/VHDL/C/C++/SystemC testbenches PARIS, France, April 22, 2002 ...
Design-Reuse

Xilinx ISE Design Suite 13.3 Full Custom Precision Floating-Point Support Extends ...

New Bit and Cycle Accurate, Single, Double and Full Custom Precision Floating-Point Now Available in System Generator for DSP SAN JOSE, Calif., Nov. 1, 2011 -- Xilinx, Inc. (NASDAQ: XLNX) today ...
EDN

Xilinx shipping ISE Design Suite 11.1

SAN FRANCISCO—Programmable logic vendor Xilinx Inc. is now shipping ISE Design Suite 11.1, described as the first FPGA design tool set with interoperable domain-specific design flows and tool ...
EDN

Xilinx ISE Design Suite 13.3 Full Custom Precision Floating-Point Support Extends ...

“Compared to competing solutions, only System Generator for DSP provides developers with a bit accurate solution, meaning we can guarantee that the simulation model will match the hardware ...
Electronic Design

Tool Increases Simulation Speed For Xilinx PGAs

Developed specifically for Xilinx devices, the Active-HDL 4.2XE achieves a 40% increase in simulation speed over the previous, 4.0XE version.With the new tool, users have the ability to seamlessly ...