IEEE

Low Power Hybrid Full Adder Design using MGDI Based XNOR Gate with Swing Restored Technique

Abstract: Low power becomes more and more necessary as technology advances. One of the essential parts of the arithmetic logic unit is the full adder that determines the performance of the arithmetic ...
IEEE

A Comparative Analysis of 4:1 Multiplexer Design Using 2:1 Multiplexers in Terms of Delay ...

Abstract: NAND gates, as they are implemented by 180nm, 90nm, and 45nm CMOS technologies also in SCL180, are applied in this work to construct and study a 4:1 multiplexer (MUX). each of which is built ...